Cyclone IV internals¶

Intel provides a handbook which describes briefly some parts of the FPGA but some others are not in detail. This page mixes both official information plus findings.

The FPGA is structured by LABs (Logic Array Blocks) which are made of 16 LEs (Logic Elements) among others blocks. Each LAB is connected internally and to others LABs and I/O. The routing network is a matrix of rows and columns but also there is a local interconnection for LABs.

Logic Elements¶

Each LEs provides outputs for row, column and local routing.

Logic Array Block¶

FPGA Fabric¶

As others FPGAs and CPLDs, the fabric is organized in tiles, where each tile has a coordinate. In the case of this model (EP4CE6E22C8) its a 34x24 matrix, where not all locations contains something.